The paper titled “MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating”, authored by Kartik Prabhu, Robert M. Radway, Jeffrey Yu, Kai Bartolone, Massimo Giordano, Fabian Peddinghaus, Yonatan Urman, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, and Priyanka Raina was presented at VLSI 2024.
Priyanka Raina’s group’s research on transformer inference and training accelerator was accepted and presented at VLSI 2024
