Seo’s group’s recent paper published at IEEE JXCDC (Special Issue on 3D Logic and Memory for Energy Efficient Computing) investigates digital compute-in-memory (DCIM) macros for various 3D IC architectures considering the carbon footprint of 3D architectures. In-house simulator calculates energy and area based on high-level hardware descriptions and neural network workloads, which is integrated with carbon estimation tool to analyze the embodied carbon of various hardware designs.
Seo’s group published paper in IEEE JXCDC
