A 65nm CMOS/RRAM test chip has been successfully fabricated and is now under testing. This test chip achieves digital-assisted analog in-memory computing (IMC). Leveraging the ensemble of RRAM IMC and digital SRAM, this design fully recovers the IMC accuracy under device variations and limited ADC precision, with high area efficiency. The chip is fabricated through the collaboration between ASU and SUNY Poly.
ASU and SUNY Poly successfully fabricate CMOS/RRAM test chip
